1. Field of the Invention
The present invention relates to the field of electronic components for optical and broadband communication systems, and in particular, to techniques implemented in integrated circuit (IC) technology for biasing and terminating the output of a broadband distributed amplifier.
2. Background
Distributed amplifiers are multi-stage amplifiers used in optical and broadband communication systems to amplify signals over a broad frequency band, including frequencies below 500 MHz. Distributed amplifiers require their input and output lines to be terminated by a load impedance equal to the characteristic impedance of each line to maximize power transfer from the distributed amplifier to the load. Preferably, this terminating load impedance (hereinafter also referred to as xe2x80x9cimpedance terminationxe2x80x9d) provides constant impedance over the entire frequency range of operation of the distributed amplifier. The impedance termination also provides direct current (dc) biases to the active gain devices in the distributed amplifier used to amplify signals. One such active gain device is the Field Effect Transistor (FET), which typically requires dc biases applied to its input terminals (e.g., gate, base) and to its output terminals (e.g., drain, collector) to place the device in an amplifying state.
Biasing the input lines of a distributed amplifier is typically not a problem, because the input terminals of the active gain devices, which make up the distributed amplifier, use little input bias current as compared to output bias current. The input bias current is also small compared to the input line impedance of the distributed amplifier. Thus, a dc bias can be applied to the input line of a distribute amplifier directly through a termination resistor without excessive power dissipation.
By contrast, it is not simple to design the impedance termination for a distributed amplifier using IC technology when the amplifier has to operate at frequencies below 500 MHz. For example, it is difficult to maintain constant output impedance termination while providing dc bias to the output terminals of the active gain devices in the distributed amplifier. This is because the output terminals of the active gain devices draw a significant amount of bias current.
One conventional solution is to provide the impedance termination on chip, and to bring the de bias through an internal inductor or an external biasing choke network. The use of an internal inductor is not an ideal solution when the lowest frequency of operation of the distributed amplifier is below 500 MHz because the size of the inductor is too large to realize on chip. A large internal inductor tends to have series resonance that limits the maximum frequency range of the distributed amplifier.
Alternatively, an external choke can be implemented as a single large inductor off chip when the lowest frequency of operation is above 50 MHz. An external choke, however, is also not an ideal solution because of the high cost of manufacturing a suitable inductor (e.g., one that is free of spurious series resonance from 50 MHz to greater than GHz). Additionally, because such inductors are physically large and of an awkward shape they are difficult to mechanically mount inside a microcircuit package next to a distributed amplifier IC using automated assembly equipment. This means they must be assembled by hand, which adds significantly to the cost of the packaged distributed amplifier assembly.
When the amplifier is required to operate at frequencies below 50 MHz, as is often the case in optical communication systems, one inductor is usually not enough. For such an amplifier, a more complicated network can be used, such as the network described in V. Kaman, T. Reynolds, A. Petersen, J. E. Bowers, xe2x80x9cA 100 KHz to 50 GHz Traveling-Wave Amplifier IC Module,xe2x80x9d IEEE Microwave and Guided Wave Letters, Vol. 9, Section 10, pp. 416-418, October (1999). While this network can achieve the required performance without adding any extra dc power dissipation, it is expensive to implement. Indeed, it may be more than twice as expensive as the single inductor method used down to 50 MHz, because it requires at least two physically large inductors, which must be mechanically supported, and which require even more expensive hand assembly.
Another common solution is to provide the dc bias to the output line of the distributed amplifier through a reverse termination resistor. This method of providing the dc bias to the output line dissipates excess power on chip. For example, a broadband amplifier which can drive 8 Volts (peak-to-peak) into a 50 Ohm load is typically biased at about 8 Volts with 250 mA of collector current, and dissipates 2 Watts of dc power when biased using a large inductor, as previously discussed. The most common output line characteristic impedance for optical and broadband applications is 50 Ohms. If one were to provide the output bias through a 50 xcexa9 termination resistor in the above example, the amplifier would have to be biased at about 20.5 Volts instead of 8 Volts. This allows for 12.5 Volts (250 mA*50 xcexa9=12.5 V) voltage drop across the biasing resistor, and leads to over 5 Watts of power dissipation, most of which is being dissipated in the reverse termination resistor. Besides the power dissipation, the reverse termination resistor has to be physically large to pass 250 mA of collector current.
There are several problems associated with implementing large termination resistors on chip. Such resistors are typically implemented as large thin film resistors, which have a large shunt capacitance and limited current handling capability. Many IC foundries have stringent limits on the current handling capability of thin film resistors. To avoid this problem a special thin film resistor process can be requested, which handles twice-as much current (e.g., using a lower xcexa9/sq thin film of extra thickness), but typically costs more to fabricate.
Accordingly, there is a need for an impedance termination that can simultaneously provide voltage-limited output dc bias and proper termination of a broadband distributed amplifier, operating down to an arbitrary low frequency. It should be capable of being fabricated in a single IC chip, without the excess power dissipation associated with biasing through a reverse termination resistor, and without the use of external biasing chokes. It should also limit the maximum dynamic voltage swing on the outputs of the active gain devices used within the distributed amplifier, so as to significantly increase the reliability of the distributed amplifier under large signal over drive conditions.
The present invention overcomes the deficiencies of conventional circuits and techniques by integrating or otherwise connecting a voltage-limited distributed current source with an integrated circuit (e.g., a distributed amplifier, broadband amplifier, mixer, oscillator, etc.) to provide biasing and termination impedance for the integrated circuit.
In one embodiment of the present invention, an integrated circuit device comprises an integrated circuit (e.g., a distributed amplifier) having input and output lines connected to a distributed current source. The integrated circuit includes one or more gain devices connected to the output line. The distributed current source includes one or more current sources connected to the output line and the gain devices. A frequency dependent termination network is connected to the output line for providing a termination impedance and a sensing device for sensing a change in bias voltage on the output line.
In one embodiment of the present invention, an integrated circuit (e.g., a distributed amplifier) having input and output lines is connected to a termination network including at least one current source and a sensing device for sensing a change in output bias voltage on the output line.
In one embodiment of the present invention, an integrated circuit device comprises an integrated circuit (e.g., a distributed amplifier) having input and output lines connected to a distributed current source. The integrated circuit includes one or more gain devices connected to the output line. The distributed current source includes one or more current sources connected to the output line and the one or more gain devices. A termination network is connected to the output line and includes at least one current source and a sensing device for sensing a change in output bias voltage on the output line.
The frequency dependent termination network for each of the foregoing embodiments can include a bias control loop connected to the output line for automatically adjusting the bias voltage on the output line. The termination networks can include various frequency dependent termination loads, including but not limited to one or more resistor-capacitor (RC) networks in star and ladder configurations or a combination of star and ladder RC networks. The termination network can also include one or more M-derived matching inductor-capacitor (LC) sections.
A delay section can be inserted in the input and/or output lines to control phase delays in the input and output lines. In one embodiment of the present invention, one or more layers of resistive film material (e.g., TFR film, bulk resistor layer) can be disposed under the input and/or output lines to increase the loss along the lines. Also, the shunt conductance of each current source can be increased at high frequencies by adding an additional RC network in shunt with each current source. To reduce jitter the distributed current sources can be configured as a Tee or Pi attenuators by connecting the current sources in shunt with one or more series resistors, which are connected in series with one or more matching inductors.
The present invention also includes various embodiments of current sources. One or more of these current sources can be a depletion mode load style current source. The current sources can include one or more of the following: a capacitive element to reduce capacitance of the current source, a resistive element to suppress oscillations in output current due to process variations, a capacitive element to maintain constant voltage at higher frequencies, and a diode for forward biasing gain devices. The currents sources can also use negative conductance to compensate for losses down the output line of the integrated circuit, such as a distributed amplifier.
The present invention can be fabricated in a single integrated circuit chip without the excess power dissipation associated with supplying the bias current through an output reverse termination resistor, and without the use of an expensive off chip biasing choke. The present invention also limits the maximum dynamic voltage swing on the outputs of the active gain devices used within the distributed amplifier, thereby increasing the reliability of the distributed amplifier under large signal over drive conditions.